openMSX
YM2151.cc
Go to the documentation of this file.
1 /*****************************************************************************
2 *
3 * Yamaha YM2151 driver (version 2.150 final beta)
4 *
5 ******************************************************************************/
6 
7 #include "YM2151.hh"
9 #include "EmuTimer.hh"
10 #include "IRQHelper.hh"
11 #include "DeviceConfig.hh"
12 #include "serialize.hh"
13 #include "memory.hh"
14 #include <cmath>
15 #include <cstring>
16 
17 namespace openmsx {
18 
19 class YM2151::Impl final : public ResampledSoundDevice, private EmuTimerCallback
20 {
21 public:
22  Impl(const std::string& name, const std::string& desc,
23  const DeviceConfig& config, EmuTime::param time);
24  ~Impl();
25  void reset(EmuTime::param time);
26  void writeReg(byte r, byte v, EmuTime::param time);
27  byte readStatus() const;
28 
29  template<typename Archive>
30  void serialize(Archive& ar, unsigned version);
31 
32 private:
33  // a single operator
34  struct YM2151Operator {
35  template<typename Archive>
36  void serialize(Archive& ar, unsigned version);
37 
38  int* connect; // operator output 'direction'
39  int* mem_connect; // where to put the delayed sample (MEM)
40 
41  unsigned phase; // accumulated operator phase
42  unsigned freq; // operator frequency count
43  int dt1; // current DT1 (detune 1 phase inc/decrement) value
44  unsigned mul; // frequency count multiply
45  unsigned dt1_i; // DT1 index * 32
46  unsigned dt2; // current DT2 (detune 2) value
47 
48  int mem_value; // delayed sample (MEM) value
49 
50  // channel specific data
51  // note: each operator number 0 contains channel specific data
52  unsigned fb_shift; // feedback shift value for operators 0 in each channel
53  int fb_out_curr; // operator feedback value (used only by operators 0)
54  int fb_out_prev; // previous feedback value (used only by operators 0)
55  unsigned kc; // channel KC (copied to all operators)
56  unsigned kc_i; // just for speedup
57  unsigned pms; // channel PMS
58  unsigned ams; // channel AMS
59 
60  unsigned AMmask; // LFO Amplitude Modulation enable mask
61  unsigned state; // Envelope state: 4-attack(AR)
62  // 3-decay(D1R)
63  // 2-sustain(D2R)
64  // 1-release(RR)
65  // 0-off
66  unsigned tl; // Total attenuation Level
67  int volume; // current envelope attenuation level
68  unsigned d1l; // envelope switches to sustain state after
69 
70  unsigned key; // 0=last key was KEY OFF, 1=last key was KEY ON
71 
72  unsigned ks; // key scale
73  unsigned ar; // attack rate
74  unsigned d1r; // decay rate
75  unsigned d2r; // sustain rate
76  unsigned rr; // release rate
77 
78  byte eg_sh_ar; // (attack state)
79  byte eg_sel_ar; // (attack state)
80  byte eg_sh_d1r; // (decay state)
81  byte eg_sel_d1r; // (decay state)
82  // reaching this level
83  byte eg_sh_d2r; // (sustain state)
84  byte eg_sel_d2r; // (sustain state)
85  byte eg_sh_rr; // (release state)
86  byte eg_sel_rr; // (release state)
87  };
88 
89  void setConnect(YM2151Operator* om1, int cha, int v);
90 
91  // SoundDevice
92  void generateChannels(int** bufs, unsigned num) override;
93 
94  void callback(byte flag) override;
95  void setStatus(byte flags);
96  void resetStatus(byte flags);
97 
98  void initTables();
99  void initChipTables();
100 
101  // operator methods
102  void envelopeKONKOFF(YM2151Operator* op, int v);
103  static void refreshEG(YM2151Operator* op);
104  int opCalc(YM2151Operator* op, unsigned env, int pm);
105  int opCalc1(YM2151Operator* op, unsigned env, int pm);
106  inline unsigned volumeCalc(YM2151Operator* op, unsigned AM);
107  inline void keyOn(YM2151Operator* op, unsigned keySet);
108  inline void keyOff(YM2151Operator* op, unsigned keyClear);
109 
110  // general chip mehods
111  void chanCalc(unsigned chan);
112  void chan7Calc();
113 
114  void advanceEG();
115  void advance();
116 
117  bool checkMuteHelper();
118 
119  IRQHelper irq;
120 
121  // Timers (see EmuTimer class for details about timing)
122  const std::unique_ptr<EmuTimer> timer1;
123  const std::unique_ptr<EmuTimer> timer2;
124 
125  YM2151Operator oper[32]; // the 32 operators
126 
127  unsigned pan[16]; // channels output masks (0xffffffff = enable)
128 
129  unsigned eg_cnt; // global envelope generator counter
130  unsigned eg_timer; // global envelope generator counter
131  // works at frequency = chipclock/64/3
132  unsigned lfo_phase; // accumulated LFO phase (0 to 255)
133  unsigned lfo_timer; // LFO timer
134  unsigned lfo_overflow; // LFO generates new output when lfo_timer
135  // reaches this value
136  unsigned lfo_counter; // LFO phase increment counter
137  unsigned lfo_counter_add;// step of lfo_counter
138  unsigned lfa; // LFO current AM output
139  int lfp; // LFO current PM output
140 
141  unsigned noise; // noise enable/period register
142  // bit 7 - noise enable, bits 4-0 - noise period
143  unsigned noise_rng; // 17 bit noise shift register
144  int noise_p; // current noise 'phase'
145  unsigned noise_f; // current noise period
146 
147  unsigned csm_req; // CSM KEY ON / KEY OFF sequence request
148 
149  unsigned irq_enable; // IRQ enable for timer B (bit 3) and timer A
150  // (bit 2); bit 7 - CSM mode (keyon to all
151  // slots, everytime timer A overflows)
152  unsigned status; // chip status (BUSY, IRQ Flags)
153 
154  // Frequency-deltas to get the closest frequency possible.
155  // There are 11 octaves because of DT2 (max 950 cents over base frequency)
156  // and LFO phase modulation (max 800 cents below AND over base frequency)
157  // Summary: octave explanation
158  // 0 note code - LFO PM
159  // 1 note code
160  // 2 note code
161  // 3 note code
162  // 4 note code
163  // 5 note code
164  // 6 note code
165  // 7 note code
166  // 8 note code
167  // 9 note code + DT2 + LFO PM
168  // 10 note code + DT2 + LFO PM
169  unsigned freq[11 * 768]; // 11 octaves, 768 'cents' per octave // No Save
170 
171  // Frequency deltas for DT1. These deltas alter operator frequency
172  // after it has been taken from frequency-deltas table.
173  int dt1_freq[8 * 32]; // 8 DT1 levels, 32 KC values // No Save
174  unsigned noise_tab[32]; // 17bit Noise Generator periods // No Save
175 
176  int chanout[8];
177  int m2, c1, c2; // Phase Modulation input for operators 2,3,4
178  int mem; // one sample delay memory
179 
180  word timer_A_val;
181 
182  byte lfo_wsel; // LFO waveform (0-saw, 1-square, 2-triangle,
183  // 3-random noise)
184  byte amd; // LFO Amplitude Modulation Depth
185  signed char pmd; // LFO Phase Modulation Depth
186 
187  byte test; // TEST register
188  byte ct; // output control pins (bit1-CT2, bit0-CT1)
189 
190  byte regs[256]; // only used for serialization ATM
191 };
192 // TODO void ym2151WritePortCallback(void* ref, unsigned port, byte value);
193 
194 static const int FREQ_SH = 16; // 16.16 fixed point (frequency calculations)
195 
196 static const int FREQ_MASK = (1 << FREQ_SH) - 1;
197 
198 static const int ENV_BITS = 10;
199 static const int ENV_LEN = 1 << ENV_BITS;
200 static const double ENV_STEP = 128.0 / ENV_LEN;
201 
202 static const int MAX_ATT_INDEX = ENV_LEN - 1; // 1023
203 static const int MIN_ATT_INDEX = 0;
204 
205 static const unsigned EG_ATT = 4;
206 static const unsigned EG_DEC = 3;
207 static const unsigned EG_SUS = 2;
208 static const unsigned EG_REL = 1;
209 static const unsigned EG_OFF = 0;
210 
211 static const int SIN_BITS = 10;
212 static const int SIN_LEN = 1 << SIN_BITS;
213 static const int SIN_MASK = SIN_LEN - 1;
214 
215 static const int TL_RES_LEN = 256; // 8 bits addressing (real chip)
216 
217 // TL_TAB_LEN is calculated as:
218 // 13 - sinus amplitude bits (Y axis)
219 // 2 - sinus sign bit (Y axis)
220 // TL_RES_LEN - sinus resolution (X axis)
221 static const unsigned TL_TAB_LEN = 13 * 2 * TL_RES_LEN;
222 static int tl_tab[TL_TAB_LEN];
223 
224 static const unsigned ENV_QUIET = TL_TAB_LEN >> 3;
225 
226 // sin waveform table in 'decibel' scale
227 static unsigned sin_tab[SIN_LEN];
228 
229 // translate from D1L to volume index (16 D1L levels)
230 static unsigned d1l_tab[16];
231 
232 
233 static const unsigned RATE_STEPS = 8;
234 static byte eg_inc[19 * RATE_STEPS] = {
235 
236 //cycle:0 1 2 3 4 5 6 7
237 
238 /* 0 */ 0,1, 0,1, 0,1, 0,1, // rates 00..11 0 (increment by 0 or 1)
239 /* 1 */ 0,1, 0,1, 1,1, 0,1, // rates 00..11 1
240 /* 2 */ 0,1, 1,1, 0,1, 1,1, // rates 00..11 2
241 /* 3 */ 0,1, 1,1, 1,1, 1,1, // rates 00..11 3
242 
243 /* 4 */ 1,1, 1,1, 1,1, 1,1, // rate 12 0 (increment by 1)
244 /* 5 */ 1,1, 1,2, 1,1, 1,2, // rate 12 1
245 /* 6 */ 1,2, 1,2, 1,2, 1,2, // rate 12 2
246 /* 7 */ 1,2, 2,2, 1,2, 2,2, // rate 12 3
247 
248 /* 8 */ 2,2, 2,2, 2,2, 2,2, // rate 13 0 (increment by 2)
249 /* 9 */ 2,2, 2,4, 2,2, 2,4, // rate 13 1
250 /*10 */ 2,4, 2,4, 2,4, 2,4, // rate 13 2
251 /*11 */ 2,4, 4,4, 2,4, 4,4, // rate 13 3
252 
253 /*12 */ 4,4, 4,4, 4,4, 4,4, // rate 14 0 (increment by 4)
254 /*13 */ 4,4, 4,8, 4,4, 4,8, // rate 14 1
255 /*14 */ 4,8, 4,8, 4,8, 4,8, // rate 14 2
256 /*15 */ 4,8, 8,8, 4,8, 8,8, // rate 14 3
257 
258 /*16 */ 8,8, 8,8, 8,8, 8,8, // rates 15 0, 15 1, 15 2, 15 3 (increment by 8)
259 /*17 */ 16,16,16,16,16,16,16,16, // rates 15 2, 15 3 for attack
260 /*18 */ 0,0, 0,0, 0,0, 0,0, // infinity rates for attack and decay(s)
261 };
262 
263 
264 #define O(a) (a*RATE_STEPS)
265 // note that there is no O(17) in this table - it's directly in the code
266 static byte eg_rate_select[32 + 64 + 32] = {
267 // Envelope Generator rates (32 + 64 rates + 32 RKS)
268 // 32 dummy (infinite time) rates
269 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
270 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
271 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
272 O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
273 
274 // rates 00-11
275 O( 0),O( 1),O( 2),O( 3),
276 O( 0),O( 1),O( 2),O( 3),
277 O( 0),O( 1),O( 2),O( 3),
278 O( 0),O( 1),O( 2),O( 3),
279 O( 0),O( 1),O( 2),O( 3),
280 O( 0),O( 1),O( 2),O( 3),
281 O( 0),O( 1),O( 2),O( 3),
282 O( 0),O( 1),O( 2),O( 3),
283 O( 0),O( 1),O( 2),O( 3),
284 O( 0),O( 1),O( 2),O( 3),
285 O( 0),O( 1),O( 2),O( 3),
286 O( 0),O( 1),O( 2),O( 3),
287 
288 // rate 12
289 O( 4),O( 5),O( 6),O( 7),
290 
291 // rate 13
292 O( 8),O( 9),O(10),O(11),
293 
294 // rate 14
295 O(12),O(13),O(14),O(15),
296 
297 // rate 15
298 O(16),O(16),O(16),O(16),
299 
300 // 32 dummy rates (same as 15 3)
301 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
302 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
303 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
304 O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16)
305 };
306 #undef O
307 
308 // rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
309 // shift 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0, 0
310 // mask 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0, 0
311 #define O(a) (a*1)
312 static byte eg_rate_shift[32 + 64 + 32] = {
313 // Envelope Generator counter shifts (32 + 64 rates + 32 RKS)
314 // 32 infinite time rates
315 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
316 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
317 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
318 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
319 
320 // rates 00-11
321 O(11),O(11),O(11),O(11),
322 O(10),O(10),O(10),O(10),
323 O( 9),O( 9),O( 9),O( 9),
324 O( 8),O( 8),O( 8),O( 8),
325 O( 7),O( 7),O( 7),O( 7),
326 O( 6),O( 6),O( 6),O( 6),
327 O( 5),O( 5),O( 5),O( 5),
328 O( 4),O( 4),O( 4),O( 4),
329 O( 3),O( 3),O( 3),O( 3),
330 O( 2),O( 2),O( 2),O( 2),
331 O( 1),O( 1),O( 1),O( 1),
332 O( 0),O( 0),O( 0),O( 0),
333 
334 // rate 12
335 O( 0),O( 0),O( 0),O( 0),
336 
337 // rate 13
338 O( 0),O( 0),O( 0),O( 0),
339 
340 // rate 14
341 O( 0),O( 0),O( 0),O( 0),
342 
343 // rate 15
344 O( 0),O( 0),O( 0),O( 0),
345 
346 // 32 dummy rates (same as 15 3)
347 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
348 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
349 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
350 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0)
351 };
352 #undef O
353 
354 // DT2 defines offset in cents from base note
355 //
356 // This table defines offset in frequency-deltas table.
357 // User's Manual page 22
358 //
359 // Values below were calculated using formula: value = orig.val / 1.5625
360 //
361 // DT2=0 DT2=1 DT2=2 DT2=3
362 // 0 600 781 950
363 static unsigned dt2_tab[4] = { 0, 384, 500, 608 };
364 
365 // DT1 defines offset in Hertz from base note
366 // This table is converted while initialization...
367 // Detune table shown in YM2151 User's Manual is wrong (verified on the real chip)
368 static byte dt1_tab[4 * 32] = {
369 // DT1 = 0
370  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
371  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
372 
373 // DT1 = 1
374  0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
375  2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 8, 8, 8,
376 
377 // DT1 = 2
378  1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5,
379  5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,
380 
381 // DT1 = 3
382  2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
383  8, 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22
384 };
385 
386 static word phaseinc_rom[768] = {
387 1299,1300,1301,1302,1303,1304,1305,1306,1308,1309,1310,1311,1313,1314,1315,1316,
388 1318,1319,1320,1321,1322,1323,1324,1325,1327,1328,1329,1330,1332,1333,1334,1335,
389 1337,1338,1339,1340,1341,1342,1343,1344,1346,1347,1348,1349,1351,1352,1353,1354,
390 1356,1357,1358,1359,1361,1362,1363,1364,1366,1367,1368,1369,1371,1372,1373,1374,
391 1376,1377,1378,1379,1381,1382,1383,1384,1386,1387,1388,1389,1391,1392,1393,1394,
392 1396,1397,1398,1399,1401,1402,1403,1404,1406,1407,1408,1409,1411,1412,1413,1414,
393 1416,1417,1418,1419,1421,1422,1423,1424,1426,1427,1429,1430,1431,1432,1434,1435,
394 1437,1438,1439,1440,1442,1443,1444,1445,1447,1448,1449,1450,1452,1453,1454,1455,
395 1458,1459,1460,1461,1463,1464,1465,1466,1468,1469,1471,1472,1473,1474,1476,1477,
396 1479,1480,1481,1482,1484,1485,1486,1487,1489,1490,1492,1493,1494,1495,1497,1498,
397 1501,1502,1503,1504,1506,1507,1509,1510,1512,1513,1514,1515,1517,1518,1520,1521,
398 1523,1524,1525,1526,1528,1529,1531,1532,1534,1535,1536,1537,1539,1540,1542,1543,
399 1545,1546,1547,1548,1550,1551,1553,1554,1556,1557,1558,1559,1561,1562,1564,1565,
400 1567,1568,1569,1570,1572,1573,1575,1576,1578,1579,1580,1581,1583,1584,1586,1587,
401 1590,1591,1592,1593,1595,1596,1598,1599,1601,1602,1604,1605,1607,1608,1609,1610,
402 1613,1614,1615,1616,1618,1619,1621,1622,1624,1625,1627,1628,1630,1631,1632,1633,
403 1637,1638,1639,1640,1642,1643,1645,1646,1648,1649,1651,1652,1654,1655,1656,1657,
404 1660,1661,1663,1664,1666,1667,1669,1670,1672,1673,1675,1676,1678,1679,1681,1682,
405 1685,1686,1688,1689,1691,1692,1694,1695,1697,1698,1700,1701,1703,1704,1706,1707,
406 1709,1710,1712,1713,1715,1716,1718,1719,1721,1722,1724,1725,1727,1728,1730,1731,
407 1734,1735,1737,1738,1740,1741,1743,1744,1746,1748,1749,1751,1752,1754,1755,1757,
408 1759,1760,1762,1763,1765,1766,1768,1769,1771,1773,1774,1776,1777,1779,1780,1782,
409 1785,1786,1788,1789,1791,1793,1794,1796,1798,1799,1801,1802,1804,1806,1807,1809,
410 1811,1812,1814,1815,1817,1819,1820,1822,1824,1825,1827,1828,1830,1832,1833,1835,
411 1837,1838,1840,1841,1843,1845,1846,1848,1850,1851,1853,1854,1856,1858,1859,1861,
412 1864,1865,1867,1868,1870,1872,1873,1875,1877,1879,1880,1882,1884,1885,1887,1888,
413 1891,1892,1894,1895,1897,1899,1900,1902,1904,1906,1907,1909,1911,1912,1914,1915,
414 1918,1919,1921,1923,1925,1926,1928,1930,1932,1933,1935,1937,1939,1940,1942,1944,
415 1946,1947,1949,1951,1953,1954,1956,1958,1960,1961,1963,1965,1967,1968,1970,1972,
416 1975,1976,1978,1980,1982,1983,1985,1987,1989,1990,1992,1994,1996,1997,1999,2001,
417 2003,2004,2006,2008,2010,2011,2013,2015,2017,2019,2021,2022,2024,2026,2028,2029,
418 2032,2033,2035,2037,2039,2041,2043,2044,2047,2048,2050,2052,2054,2056,2058,2059,
419 2062,2063,2065,2067,2069,2071,2073,2074,2077,2078,2080,2082,2084,2086,2088,2089,
420 2092,2093,2095,2097,2099,2101,2103,2104,2107,2108,2110,2112,2114,2116,2118,2119,
421 2122,2123,2125,2127,2129,2131,2133,2134,2137,2139,2141,2142,2145,2146,2148,2150,
422 2153,2154,2156,2158,2160,2162,2164,2165,2168,2170,2172,2173,2176,2177,2179,2181,
423 2185,2186,2188,2190,2192,2194,2196,2197,2200,2202,2204,2205,2208,2209,2211,2213,
424 2216,2218,2220,2222,2223,2226,2227,2230,2232,2234,2236,2238,2239,2242,2243,2246,
425 2249,2251,2253,2255,2256,2259,2260,2263,2265,2267,2269,2271,2272,2275,2276,2279,
426 2281,2283,2285,2287,2288,2291,2292,2295,2297,2299,2301,2303,2304,2307,2308,2311,
427 2315,2317,2319,2321,2322,2325,2326,2329,2331,2333,2335,2337,2338,2341,2342,2345,
428 2348,2350,2352,2354,2355,2358,2359,2362,2364,2366,2368,2370,2371,2374,2375,2378,
429 2382,2384,2386,2388,2389,2392,2393,2396,2398,2400,2402,2404,2407,2410,2411,2414,
430 2417,2419,2421,2423,2424,2427,2428,2431,2433,2435,2437,2439,2442,2445,2446,2449,
431 2452,2454,2456,2458,2459,2462,2463,2466,2468,2470,2472,2474,2477,2480,2481,2484,
432 2488,2490,2492,2494,2495,2498,2499,2502,2504,2506,2508,2510,2513,2516,2517,2520,
433 2524,2526,2528,2530,2531,2534,2535,2538,2540,2542,2544,2546,2549,2552,2553,2556,
434 2561,2563,2565,2567,2568,2571,2572,2575,2577,2579,2581,2583,2586,2589,2590,2593
435 };
436 
437 // Noise LFO waveform.
438 //
439 // Here are just 256 samples out of much longer data.
440 //
441 // It does NOT repeat every 256 samples on real chip and I wasnt able to find
442 // the point where it repeats (even in strings as long as 131072 samples).
443 //
444 // I only put it here because its better than nothing and perhaps
445 // someone might be able to figure out the real algorithm.
446 //
447 // Note that (due to the way the LFO output is calculated) it is quite
448 // possible that two values: 0x80 and 0x00 might be wrong in this table.
449 // To be exact:
450 // some 0x80 could be 0x81 as well as some 0x00 could be 0x01.
451 static byte lfo_noise_waveform[256] = {
452 0xFF,0xEE,0xD3,0x80,0x58,0xDA,0x7F,0x94,0x9E,0xE3,0xFA,0x00,0x4D,0xFA,0xFF,0x6A,
453 0x7A,0xDE,0x49,0xF6,0x00,0x33,0xBB,0x63,0x91,0x60,0x51,0xFF,0x00,0xD8,0x7F,0xDE,
454 0xDC,0x73,0x21,0x85,0xB2,0x9C,0x5D,0x24,0xCD,0x91,0x9E,0x76,0x7F,0x20,0xFB,0xF3,
455 0x00,0xA6,0x3E,0x42,0x27,0x69,0xAE,0x33,0x45,0x44,0x11,0x41,0x72,0x73,0xDF,0xA2,
456 
457 0x32,0xBD,0x7E,0xA8,0x13,0xEB,0xD3,0x15,0xDD,0xFB,0xC9,0x9D,0x61,0x2F,0xBE,0x9D,
458 0x23,0x65,0x51,0x6A,0x84,0xF9,0xC9,0xD7,0x23,0xBF,0x65,0x19,0xDC,0x03,0xF3,0x24,
459 0x33,0xB6,0x1E,0x57,0x5C,0xAC,0x25,0x89,0x4D,0xC5,0x9C,0x99,0x15,0x07,0xCF,0xBA,
460 0xC5,0x9B,0x15,0x4D,0x8D,0x2A,0x1E,0x1F,0xEA,0x2B,0x2F,0x64,0xA9,0x50,0x3D,0xAB,
461 
462 0x50,0x77,0xE9,0xC0,0xAC,0x6D,0x3F,0xCA,0xCF,0x71,0x7D,0x80,0xA6,0xFD,0xFF,0xB5,
463 0xBD,0x6F,0x24,0x7B,0x00,0x99,0x5D,0xB1,0x48,0xB0,0x28,0x7F,0x80,0xEC,0xBF,0x6F,
464 0x6E,0x39,0x90,0x42,0xD9,0x4E,0x2E,0x12,0x66,0xC8,0xCF,0x3B,0x3F,0x10,0x7D,0x79,
465 0x00,0xD3,0x1F,0x21,0x93,0x34,0xD7,0x19,0x22,0xA2,0x08,0x20,0xB9,0xB9,0xEF,0x51,
466 
467 0x99,0xDE,0xBF,0xD4,0x09,0x75,0xE9,0x8A,0xEE,0xFD,0xE4,0x4E,0x30,0x17,0xDF,0xCE,
468 0x11,0xB2,0x28,0x35,0xC2,0x7C,0x64,0xEB,0x91,0x5F,0x32,0x0C,0x6E,0x00,0xF9,0x92,
469 0x19,0xDB,0x8F,0xAB,0xAE,0xD6,0x12,0xC4,0x26,0x62,0xCE,0xCC,0x0A,0x03,0xE7,0xDD,
470 0xE2,0x4D,0x8A,0xA6,0x46,0x95,0x0F,0x8F,0xF5,0x15,0x97,0x32,0xD4,0x28,0x1E,0x55
471 };
472 
473 void YM2151::Impl::initTables()
474 {
475  for (int x = 0; x < TL_RES_LEN; ++x) {
476  double m = (1 << 16) / pow(2, (x + 1) * (ENV_STEP / 4.0) / 8.0);
477  m = floor(m);
478 
479  // we never reach (1 << 16) here due to the (x + 1)
480  // result fits within 16 bits at maximum
481 
482  int n = int(m); // 16 bits here
483  n >>= 4; // 12 bits here
484  if (n & 1) { // round to closest
485  n = (n >> 1) + 1;
486  } else {
487  n = n >> 1;
488  }
489  // 11 bits here (rounded)
490  n <<= 2; // 13 bits here (as in real chip)
491  tl_tab[x * 2 + 0] = n;
492  tl_tab[x * 2 + 1] = -tl_tab[x * 2 + 0];
493 
494  for (int i = 1; i < 13; ++i) {
495  tl_tab[x * 2 + 0 + i * 2 * TL_RES_LEN] = tl_tab[x * 2 + 0] >> i;
496  tl_tab[x * 2 + 1 + i * 2 * TL_RES_LEN] = -tl_tab[x * 2 + 0 + i * 2 * TL_RES_LEN];
497  }
498  }
499 
500  for (int i = 0; i < SIN_LEN; ++i) {
501  // non-standard sinus
502  double m = sin((i * 2 + 1) * M_PI / SIN_LEN); // verified on the real chip
503 
504  // we never reach zero here due to (i * 2 + 1)
505  double o;
506  if (m > 0.0) { // convert to decibels
507  o = 8 * log( 1.0 / m) / log(2.0);
508  } else {
509  o = 8 * log(-1.0 / m) / log(2.0);
510  }
511  o = o / (ENV_STEP / 4);
512 
513  int n = int(2.0 * o);
514  if (n & 1) { // round to closest
515  n = (n >> 1) + 1;
516  } else {
517  n = n >> 1;
518  }
519  sin_tab[i] = n * 2 + (m >= 0.0 ? 0 : 1);
520  }
521 
522  // calculate d1l_tab table
523  for (int i = 0; i < 16; ++i) {
524  // every 3 'dB' except for all bits = 1 = 45+48 'dB'
525  double m = unsigned((i != 15 ? i : i + 16) * (4.0 / ENV_STEP));
526  d1l_tab[i] = unsigned(m);
527  }
528 }
529 
530 void YM2151::Impl::initChipTables()
531 {
532  // this loop calculates Hertz values for notes from c-0 to b-7
533  // including 64 'cents' (100/64 that is 1.5625 of real cent) per note
534  // i*100/64/1200 is equal to i/768
535 
536  // real chip works with 10 bits fixed point values (10.10)
537  // -10 because phaseinc_rom table values are already in 10.10 format
538  double mult = 1 << (FREQ_SH - 10);
539 
540  for (int i = 0; i < 768; ++i) {
541  double phaseinc = phaseinc_rom[i]; // real chip phase increment
542 
543  // octave 2 - reference octave
544  // adjust to X.10 fixed point
545  freq[768 + 2 * 768 + i] = int(phaseinc * mult) & 0xffffffc0;
546  // octave 0 and octave 1
547  for (int j = 0; j < 2; ++j) {
548  // adjust to X.10 fixed point
549  freq[768 + j * 768 + i] = (freq[768 + 2 * 768 + i] >> (2 - j)) & 0xffffffc0;
550  }
551  // octave 3 to 7
552  for (int j = 3; j < 8; ++j) {
553  freq[768 + j * 768 + i] = freq[768 + 2 * 768 + i] << (j - 2);
554  }
555  }
556 
557  // octave -1 (all equal to: oct 0, _KC_00_, _KF_00_)
558  for (int i = 0; i < 768; ++i) {
559  freq[0 * 768 + i] = freq[1 * 768 + 0];
560  }
561 
562  // octave 8 and 9 (all equal to: oct 7, _KC_14_, _KF_63_)
563  for (int j = 8; j < 10; ++j) {
564  for (int i = 0; i < 768; ++i) {
565  freq[768 + j * 768 + i] = freq[768 + 8 * 768 - 1];
566  }
567  }
568 
569  mult = 1 << FREQ_SH;
570  for (int j = 0; j < 4; ++j) {
571  for (int i = 0; i < 32; ++i) {
572 
573  // calculate phase increment
574  double phaseinc = double(dt1_tab[j * 32 + i]) / (1 << 20) * (SIN_LEN);
575 
576  // positive and negative values
577  dt1_freq[(j + 0) * 32 + i] = int(phaseinc * mult);
578  dt1_freq[(j + 4) * 32 + i] = -dt1_freq[(j + 0) * 32 + i];
579  }
580  }
581 
582  timer_A_val = 0;
583 
584  // calculate noise periods table
585  // this table tells how many cycles/samples it takes before noise is recalculated.
586  // 2/2 means every cycle/sample, 2/5 means 2 out of 5 cycles/samples, etc.
587  for (int i = 0; i < 32; ++i) {
588  noise_tab[i] = 32 - (i != 31 ? i : 30); // rate 30 and 31 are the same
589  }
590 }
591 
592 void YM2151::Impl::keyOn(YM2151Operator* op, unsigned keySet) {
593  if (!op->key) {
594  op->phase = 0; /* clear phase */
595  op->state = EG_ATT; /* KEY ON = attack */
596  op->volume += (~op->volume *
597  (eg_inc[op->eg_sel_ar + ((eg_cnt >> op->eg_sh_ar)&7)])
598  ) >>4;
599  if (op->volume <= MIN_ATT_INDEX) {
600  op->volume = MIN_ATT_INDEX;
601  op->state = EG_DEC;
602  }
603  }
604  op->key |= keySet;
605 }
606 
607 void YM2151::Impl::keyOff(YM2151Operator* op, unsigned keyClear) {
608  if (op->key) {
609  op->key &= keyClear;
610  if (!op->key) {
611  if (op->state > EG_REL) {
612  op->state = EG_REL; /* KEY OFF = release */
613  }
614  }
615  }
616 }
617 
618 void YM2151::Impl::envelopeKONKOFF(YM2151Operator* op, int v)
619 {
620  if (v & 0x08) { // M1
621  keyOn (op + 0, 1);
622  } else {
623  keyOff(op + 0,unsigned(~1));
624  }
625  if (v & 0x20) { // M2
626  keyOn (op + 1, 1);
627  } else {
628  keyOff(op + 1,unsigned(~1));
629  }
630  if (v & 0x10) { // C1
631  keyOn (op + 2, 1);
632  } else {
633  keyOff(op + 2,unsigned(~1));
634  }
635  if (v & 0x40) { // C2
636  keyOn (op + 3, 1);
637  } else {
638  keyOff(op + 3,unsigned(~1));
639  }
640 }
641 
642 void YM2151::Impl::setConnect(YM2151Operator* om1, int cha, int v)
643 {
644  YM2151Operator* om2 = om1 + 1;
645  YM2151Operator* oc1 = om1 + 2;
646 
647  // set connect algorithm
648  // MEM is simply one sample delay
649  switch (v & 7) {
650  case 0:
651  // M1---C1---MEM---M2---C2---OUT
652  om1->connect = &c1;
653  oc1->connect = &mem;
654  om2->connect = &c2;
655  om1->mem_connect = &m2;
656  break;
657 
658  case 1:
659  // M1------+-MEM---M2---C2---OUT
660  // C1-+
661  om1->connect = &mem;
662  oc1->connect = &mem;
663  om2->connect = &c2;
664  om1->mem_connect = &m2;
665  break;
666 
667  case 2:
668  // M1-----------------+-C2---OUT
669  // C1---MEM---M2-+
670  om1->connect = &c2;
671  oc1->connect = &mem;
672  om2->connect = &c2;
673  om1->mem_connect = &m2;
674  break;
675 
676  case 3:
677  // M1---C1---MEM------+-C2---OUT
678  // M2-+
679  om1->connect = &c1;
680  oc1->connect = &mem;
681  om2->connect = &c2;
682  om1->mem_connect = &c2;
683  break;
684 
685  case 4:
686  // M1---C1-+-OUT
687  // M2---C2-+
688  // MEM: not used
689  om1->connect = &c1;
690  oc1->connect = &chanout[cha];
691  om2->connect = &c2;
692  om1->mem_connect = &mem; // store it anywhere where it will not be used
693  break;
694 
695  case 5:
696  // +----C1----+
697  // M1-+-MEM---M2-+-OUT
698  // +----C2----+
699  om1->connect = nullptr; // special mark
700  oc1->connect = &chanout[cha];
701  om2->connect = &chanout[cha];
702  om1->mem_connect = &m2;
703  break;
704 
705  case 6:
706  // M1---C1-+
707  // M2-+-OUT
708  // C2-+
709  // MEM: not used
710  om1->connect = &c1;
711  oc1->connect = &chanout[cha];
712  om2->connect = &chanout[cha];
713  om1->mem_connect = &mem; // store it anywhere where it will not be used
714  break;
715 
716  case 7:
717  // M1-+
718  // C1-+-OUT
719  // M2-+
720  // C2-+
721  // MEM: not used
722  om1->connect = &chanout[cha];
723  oc1->connect = &chanout[cha];
724  om2->connect = &chanout[cha];
725  om1->mem_connect = &mem; // store it anywhere where it will not be used
726  break;
727  }
728 }
729 
730 void YM2151::Impl::refreshEG(YM2151Operator* op)
731 {
732  unsigned kc = op->kc;
733 
734  // v = 32 + 2*RATE + RKS = max 126
735  unsigned v = kc >> op->ks;
736  if ((op->ar + v) < 32 + 62) {
737  op->eg_sh_ar = eg_rate_shift [op->ar + v];
738  op->eg_sel_ar = eg_rate_select[op->ar + v];
739  } else {
740  op->eg_sh_ar = 0;
741  op->eg_sel_ar = 17 * RATE_STEPS;
742  }
743  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
744  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
745  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
746  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
747  op->eg_sh_rr = eg_rate_shift [op->rr + v];
748  op->eg_sel_rr = eg_rate_select[op->rr + v];
749 
750  op += 1;
751  v = kc >> op->ks;
752  if ((op->ar + v) < 32 + 62) {
753  op->eg_sh_ar = eg_rate_shift [op->ar + v];
754  op->eg_sel_ar = eg_rate_select[op->ar + v];
755  } else {
756  op->eg_sh_ar = 0;
757  op->eg_sel_ar = 17 * RATE_STEPS;
758  }
759  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
760  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
761  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
762  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
763  op->eg_sh_rr = eg_rate_shift [op->rr + v];
764  op->eg_sel_rr = eg_rate_select[op->rr + v];
765 
766  op += 1;
767  v = kc >> op->ks;
768  if ((op->ar + v) < 32 + 62) {
769  op->eg_sh_ar = eg_rate_shift [op->ar + v];
770  op->eg_sel_ar = eg_rate_select[op->ar + v];
771  } else {
772  op->eg_sh_ar = 0;
773  op->eg_sel_ar = 17 * RATE_STEPS;
774  }
775  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
776  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
777  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
778  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
779  op->eg_sh_rr = eg_rate_shift [op->rr + v];
780  op->eg_sel_rr = eg_rate_select[op->rr + v];
781 
782  op += 1;
783  v = kc >> op->ks;
784  if ((op->ar + v) < 32 + 62) {
785  op->eg_sh_ar = eg_rate_shift [op->ar + v];
786  op->eg_sel_ar = eg_rate_select[op->ar + v];
787  } else {
788  op->eg_sh_ar = 0;
789  op->eg_sel_ar = 17 * RATE_STEPS;
790  }
791  op->eg_sh_d1r = eg_rate_shift [op->d1r + v];
792  op->eg_sel_d1r = eg_rate_select[op->d1r + v];
793  op->eg_sh_d2r = eg_rate_shift [op->d2r + v];
794  op->eg_sel_d2r = eg_rate_select[op->d2r + v];
795  op->eg_sh_rr = eg_rate_shift [op->rr + v];
796  op->eg_sel_rr = eg_rate_select[op->rr + v];
797 }
798 
800 {
801  updateStream(time);
802 
803  YM2151Operator* op = &oper[(r & 0x07) * 4 + ((r & 0x18) >> 3)];
804 
805  regs[r] = v;
806  switch (r & 0xe0) {
807  case 0x00:
808  switch (r) {
809  case 0x01: // LFO reset(bit 1), Test Register (other bits)
810  test = v;
811  if (v & 2) lfo_phase = 0;
812  break;
813 
814  case 0x08:
815  envelopeKONKOFF(&oper[(v & 7) * 4], v);
816  break;
817 
818  case 0x0f: // noise mode enable, noise period
819  noise = v;
820  noise_f = noise_tab[v & 0x1f];
821  noise_p = 0;
822  break;
823 
824  case 0x10:
825  timer_A_val &= 0x03;
826  timer_A_val |= v << 2;
827  timer1->setValue(timer_A_val);
828  break;
829 
830  case 0x11:
831  timer_A_val &= 0x03fc;
832  timer_A_val |= v & 3;
833  timer1->setValue(timer_A_val);
834  break;
835 
836  case 0x12:
837  timer2->setValue(v);
838  break;
839 
840  case 0x14: // CSM, irq flag reset, irq enable, timer start/stop
841  irq_enable = v; // bit 3-timer B, bit 2-timer A, bit 7 - CSM
842  if (v & 0x10) { // reset timer A irq flag
843  resetStatus(1);
844  }
845  if (v & 0x20) { // reset timer B irq flag
846  resetStatus(2);
847  }
848  timer1->setStart((v & 4) != 0, time);
849  timer2->setStart((v & 8) != 0, time);
850  break;
851 
852  case 0x18: // LFO frequency
853  lfo_overflow = (1 << ((15 - (v >> 4)) + 3));
854  lfo_counter_add = 0x10 + (v & 0x0f);
855  break;
856 
857  case 0x19: // PMD (bit 7==1) or AMD (bit 7==0)
858  if (v & 0x80) {
859  pmd = v & 0x7f;
860  } else {
861  amd = v & 0x7f;
862  }
863  break;
864 
865  case 0x1b: // CT2, CT1, LFO waveform
866  ct = v >> 6;
867  lfo_wsel = v & 3;
868  // TODO ym2151WritePortCallback(0 , ct);
869  break;
870 
871  default:
872  break;
873  }
874  break;
875 
876  case 0x20:
877  op = &oper[(r & 7) * 4];
878  switch (r & 0x18) {
879  case 0x00: // RL enable, Feedback, Connection
880  op->fb_shift = ((v >> 3) & 7) ? ((v >> 3) & 7) + 6 : 0;
881  pan[(r & 7) * 2 + 0] = (v & 0x40) ? ~0 : 0;
882  pan[(r & 7) * 2 + 1] = (v & 0x80) ? ~0 : 0;
883  setConnect(op, r & 7, v & 7);
884  break;
885 
886  case 0x08: // Key Code
887  v &= 0x7f;
888  if (v != op->kc) {
889  unsigned kc_channel = (v - (v>>2))*64;
890  kc_channel += 768;
891  kc_channel |= (op->kc_i & 63);
892 
893  (op + 0)->kc = v;
894  (op + 0)->kc_i = kc_channel;
895  (op + 1)->kc = v;
896  (op + 1)->kc_i = kc_channel;
897  (op + 2)->kc = v;
898  (op + 2)->kc_i = kc_channel;
899  (op + 3)->kc = v;
900  (op + 3)->kc_i = kc_channel;
901 
902  unsigned kc = v>>2;
903  (op + 0)->dt1 = dt1_freq[(op + 0)->dt1_i + kc];
904  (op + 0)->freq = ((freq[kc_channel + (op + 0)->dt2] + (op + 0)->dt1) * (op + 0)->mul) >> 1;
905 
906  (op + 1)->dt1 = dt1_freq[(op + 1)->dt1_i + kc];
907  (op + 1)->freq = ((freq[kc_channel + (op + 1)->dt2] + (op + 1)->dt1) * (op + 1)->mul) >> 1;
908 
909  (op + 2)->dt1 = dt1_freq[(op + 2)->dt1_i + kc];
910  (op + 2)->freq = ((freq[kc_channel + (op + 2)->dt2] + (op + 2)->dt1) * (op + 2)->mul) >> 1;
911 
912  (op + 3)->dt1 = dt1_freq[(op + 3)->dt1_i + kc];
913  (op + 3)->freq = ((freq[kc_channel + (op + 3)->dt2] + (op + 3)->dt1) * (op + 3)->mul) >> 1;
914 
915  refreshEG( op );
916  }
917  break;
918 
919  case 0x10: // Key Fraction
920  v >>= 2;
921  if (v != (op->kc_i & 63)) {
922  unsigned kc_channel = v;
923  kc_channel |= (op->kc_i & ~63);
924 
925  (op + 0)->kc_i = kc_channel;
926  (op + 1)->kc_i = kc_channel;
927  (op + 2)->kc_i = kc_channel;
928  (op + 3)->kc_i = kc_channel;
929 
930  (op + 0)->freq = ((freq[kc_channel + (op + 0)->dt2] + (op + 0)->dt1) * (op + 0)->mul) >> 1;
931  (op + 1)->freq = ((freq[kc_channel + (op + 1)->dt2] + (op + 1)->dt1) * (op + 1)->mul) >> 1;
932  (op + 2)->freq = ((freq[kc_channel + (op + 2)->dt2] + (op + 2)->dt1) * (op + 2)->mul) >> 1;
933  (op + 3)->freq = ((freq[kc_channel + (op + 3)->dt2] + (op + 3)->dt1) * (op + 3)->mul) >> 1;
934  }
935  break;
936 
937  case 0x18: // PMS, AMS
938  op->pms = (v >> 4) & 7;
939  op->ams = (v & 3);
940  break;
941  }
942  break;
943 
944  case 0x40: { // DT1, MUL
945  unsigned olddt1_i = op->dt1_i;
946  unsigned oldmul = op->mul;
947 
948  op->dt1_i = (v & 0x70) << 1;
949  op->mul = (v & 0x0f) ? (v & 0x0f) << 1 : 1;
950 
951  if (olddt1_i != op->dt1_i) {
952  op->dt1 = dt1_freq[ op->dt1_i + (op->kc>>2) ];
953  }
954  if ((olddt1_i != op->dt1_i) || (oldmul != op->mul)) {
955  op->freq = ((freq[op->kc_i + op->dt2] + op->dt1) * op->mul) >> 1;
956  }
957  break;
958  }
959  case 0x60: // TL
960  op->tl = (v & 0x7f) << (ENV_BITS - 7); // 7bit TL
961  break;
962 
963  case 0x80: { // KS, AR
964  unsigned oldks = op->ks;
965  unsigned oldar = op->ar;
966  op->ks = 5 - (v >> 6);
967  op->ar = (v & 0x1f) ? 32 + ((v & 0x1f) << 1) : 0;
968 
969  if ((op->ar != oldar) || (op->ks != oldks)) {
970  if ((op->ar + (op->kc >> op->ks)) < 32 + 62) {
971  op->eg_sh_ar = eg_rate_shift [op->ar + (op->kc>>op->ks)];
972  op->eg_sel_ar = eg_rate_select[op->ar + (op->kc>>op->ks)];
973  } else {
974  op->eg_sh_ar = 0;
975  op->eg_sel_ar = 17 * RATE_STEPS;
976  }
977  }
978  if (op->ks != oldks) {
979  op->eg_sh_d1r = eg_rate_shift [op->d1r + (op->kc >> op->ks)];
980  op->eg_sel_d1r = eg_rate_select[op->d1r + (op->kc >> op->ks)];
981  op->eg_sh_d2r = eg_rate_shift [op->d2r + (op->kc >> op->ks)];
982  op->eg_sel_d2r = eg_rate_select[op->d2r + (op->kc >> op->ks)];
983  op->eg_sh_rr = eg_rate_shift [op->rr + (op->kc >> op->ks)];
984  op->eg_sel_rr = eg_rate_select[op->rr + (op->kc >> op->ks)];
985  }
986  break;
987  }
988  case 0xa0: // LFO AM enable, D1R
989  op->AMmask = (v & 0x80) ? ~0 : 0;
990  op->d1r = (v & 0x1f) ? 32 + ((v & 0x1f) << 1) : 0;
991  op->eg_sh_d1r = eg_rate_shift [op->d1r + (op->kc >> op->ks)];
992  op->eg_sel_d1r = eg_rate_select[op->d1r + (op->kc >> op->ks)];
993  break;
994 
995  case 0xc0: { // DT2, D2R
996  unsigned olddt2 = op->dt2;
997  op->dt2 = dt2_tab[v >> 6];
998  if (op->dt2 != olddt2) {
999  op->freq = ((freq[op->kc_i + op->dt2] + op->dt1) * op->mul) >> 1;
1000  }
1001  op->d2r = (v & 0x1f) ? 32 + ((v & 0x1f) << 1) : 0;
1002  op->eg_sh_d2r = eg_rate_shift [op->d2r + (op->kc >> op->ks)];
1003  op->eg_sel_d2r = eg_rate_select[op->d2r + (op->kc >> op->ks)];
1004  break;
1005  }
1006  case 0xe0: // D1L, RR
1007  op->d1l = d1l_tab[v >> 4];
1008  op->rr = 34 + ((v & 0x0f) << 2);
1009  op->eg_sh_rr = eg_rate_shift [op->rr + (op->kc >> op->ks)];
1010  op->eg_sel_rr = eg_rate_select[op->rr + (op->kc >> op->ks)];
1011  break;
1012  }
1013 }
1014 
1015 YM2151::Impl::Impl(const std::string& name, const std::string& desc,
1016  const DeviceConfig& config, EmuTime::param time)
1017  : ResampledSoundDevice(config.getMotherBoard(), name, desc, 8, true)
1018  , irq(config.getMotherBoard(), getName() + ".IRQ")
1019  , timer1(EmuTimer::createOPM_1(config.getScheduler(), *this))
1020  , timer2(EmuTimer::createOPM_2(config.getScheduler(), *this))
1021 {
1022  // Avoid UMR on savestate
1023  // TODO Registers 0x20-0xFF are cleared on reset.
1024  // Should we do the same for registers 0x00-0x1F?
1025  memset(regs, 0, sizeof(regs));
1026 
1027  initTables();
1028  initChipTables();
1029 
1030  static const int CLCK_FREQ = 3579545;
1031  double input = CLCK_FREQ / 64.0;
1032  setInputRate(int(input + 0.5));
1033 
1034  reset(time);
1035 
1036  registerSound(config);
1037 }
1038 
1040 {
1041  unregisterSound();
1042 }
1043 
1044 bool YM2151::Impl::checkMuteHelper()
1045 {
1046  for (auto& op : oper) {
1047  if (op.state != EG_OFF) return false;
1048  }
1049  return true;
1050 }
1051 
1053 {
1054  // initialize hardware registers
1055  for (auto& op : oper) {
1056  memset(&op, '\0', sizeof(op));
1057  op.volume = MAX_ATT_INDEX;
1058  op.kc_i = 768; // min kc_i value
1059  }
1060 
1061  eg_timer = 0;
1062  eg_cnt = 0;
1063 
1064  lfo_timer = 0;
1065  lfo_counter = 0;
1066  lfo_phase = 0;
1067  lfo_wsel = 0;
1068  pmd = 0;
1069  amd = 0;
1070  lfa = 0;
1071  lfp = 0;
1072 
1073  test = 0;
1074 
1075  irq_enable = 0;
1076  timer1->setStart(0, time);
1077  timer2->setStart(0, time);
1078 
1079  noise = 0;
1080  noise_rng = 0;
1081  noise_p = 0;
1082  noise_f = noise_tab[0];
1083 
1084  csm_req = 0;
1085  status = 0;
1086 
1087  writeReg(0x1b, 0, time); // only because of CT1, CT2 output pins
1088  writeReg(0x18, 0, time); // set LFO frequency
1089  for (int i = 0x20; i < 0x100; ++i) { // set the operators
1090  writeReg(i, 0, time);
1091  }
1092 
1093  irq.reset();
1094 }
1095 
1096 int YM2151::Impl::opCalc(YM2151Operator* OP, unsigned env, int pm)
1097 {
1098  unsigned p = (env << 3) + sin_tab[(int((OP->phase & ~FREQ_MASK) + (pm << 15)) >> FREQ_SH) & SIN_MASK];
1099  if (p >= TL_TAB_LEN) {
1100  return 0;
1101  }
1102  return tl_tab[p];
1103 }
1104 
1105 int YM2151::Impl::opCalc1(YM2151Operator* OP, unsigned env, int pm)
1106 {
1107  int i = (OP->phase & ~FREQ_MASK) + pm;
1108  unsigned p = (env << 3) + sin_tab[(i >> FREQ_SH) & SIN_MASK];
1109  if (p >= TL_TAB_LEN) {
1110  return 0;
1111  }
1112  return tl_tab[p];
1113 }
1114 
1115 unsigned YM2151::Impl::volumeCalc(YM2151Operator* OP, unsigned AM)
1116 {
1117  return OP->tl + unsigned(OP->volume) + (AM & OP->AMmask);
1118 }
1119 
1120 void YM2151::Impl::chanCalc(unsigned chan)
1121 {
1122  m2 = c1 = c2 = mem = 0;
1123  YM2151Operator* op = &oper[chan*4]; // M1
1124  *op->mem_connect = op->mem_value; // restore delayed sample (MEM) value to m2 or c2
1125 
1126  unsigned AM = 0;
1127  if (op->ams) {
1128  AM = lfa << (op->ams-1);
1129  }
1130  unsigned env = volumeCalc(op, AM);
1131  {
1132  int out = op->fb_out_prev + op->fb_out_curr;
1133  op->fb_out_prev = op->fb_out_curr;
1134 
1135  if (!op->connect) {
1136  // algorithm 5
1137  mem = c1 = c2 = op->fb_out_prev;
1138  } else {
1139  *op->connect = op->fb_out_prev;
1140  }
1141  op->fb_out_curr = 0;
1142  if (env < ENV_QUIET) {
1143  if (!op->fb_shift) {
1144  out = 0;
1145  }
1146  op->fb_out_curr = opCalc1(op, env, (out << op->fb_shift));
1147  }
1148  }
1149 
1150  env = volumeCalc(op + 1, AM); // M2
1151  if (env < ENV_QUIET) {
1152  *(op + 1)->connect += opCalc(op + 1, env, m2);
1153  }
1154  env = volumeCalc(op + 2, AM); // C1
1155  if (env < ENV_QUIET) {
1156  *(op + 2)->connect += opCalc(op + 2, env, c1);
1157  }
1158  env = volumeCalc(op + 3, AM); // C2
1159  if (env < ENV_QUIET) {
1160  chanout[chan] += opCalc(op + 3, env, c2);
1161  }
1162  // M1
1163  op->mem_value = mem;
1164 }
1165 
1166 void YM2151::Impl::chan7Calc()
1167 {
1168  m2 = c1 = c2 = mem = 0;
1169  YM2151Operator* op = &oper[7 * 4]; // M1
1170 
1171  *op->mem_connect = op->mem_value; // restore delayed sample (MEM) value to m2 or c2
1172 
1173  unsigned AM = 0;
1174  if (op->ams) {
1175  AM = lfa << (op->ams - 1);
1176  }
1177  unsigned env = volumeCalc(op, AM);
1178  {
1179  int out = op->fb_out_prev + op->fb_out_curr;
1180  op->fb_out_prev = op->fb_out_curr;
1181 
1182  if (!op->connect) {
1183  // algorithm 5
1184  mem = c1 = c2 = op->fb_out_prev;
1185  } else {
1186  // other algorithms
1187  *op->connect = op->fb_out_prev;
1188  }
1189  op->fb_out_curr = 0;
1190  if (env < ENV_QUIET) {
1191  if (!op->fb_shift) {
1192  out = 0;
1193  }
1194  op->fb_out_curr = opCalc1(op, env, (out << op->fb_shift));
1195  }
1196  }
1197 
1198  env = volumeCalc(op + 1, AM); // M2
1199  if (env < ENV_QUIET) {
1200  *(op + 1)->connect += opCalc(op + 1, env, m2);
1201  }
1202  env = volumeCalc(op + 2, AM); // C1
1203  if (env < ENV_QUIET) {
1204  *(op + 2)->connect += opCalc(op + 2, env, c1);
1205  }
1206  env = volumeCalc(op + 3, AM); // C2
1207  if (noise & 0x80) {
1208  unsigned noiseout = 0;
1209  if (env < 0x3ff) {
1210  noiseout = (env ^ 0x3ff) * 2; // range of the YM2151 noise output is -2044 to 2040
1211  }
1212  chanout[7] += (noise_rng & 0x10000) ? noiseout : unsigned(-int(noiseout)); // bit 16 -> output
1213  } else {
1214  if (env < ENV_QUIET) {
1215  chanout[7] += opCalc(op + 3, env, c2);
1216  }
1217  }
1218  // M1
1219  op->mem_value = mem;
1220 }
1221 
1222 /*
1223 The 'rate' is calculated from following formula (example on decay rate):
1224  rks = notecode after key scaling (a value from 0 to 31)
1225  DR = value written to the chip register
1226  rate = 2*DR + rks; (max rate = 2*31+31 = 93)
1227 Four MSBs of the 'rate' above are the 'main' rate (from 00 to 15)
1228 Two LSBs of the 'rate' above are the value 'x' (the shape type).
1229 (eg. '11 2' means that 'rate' is 11*4+2=46)
1230 
1231 NOTE: A 'sample' in the description below is actually 3 output samples,
1232 thats because the Envelope Generator clock is equal to internal_clock/3.
1233 
1234 Single '-' (minus) character in the diagrams below represents one sample
1235 on the output; this is for rates 11 x (11 0, 11 1, 11 2 and 11 3)
1236 
1237 these 'main' rates:
1238 00 x: single '-' = 2048 samples; (ie. level can change every 2048 samples)
1239 01 x: single '-' = 1024 samples;
1240 02 x: single '-' = 512 samples;
1241 03 x: single '-' = 256 samples;
1242 04 x: single '-' = 128 samples;
1243 05 x: single '-' = 64 samples;
1244 06 x: single '-' = 32 samples;
1245 07 x: single '-' = 16 samples;
1246 08 x: single '-' = 8 samples;
1247 09 x: single '-' = 4 samples;
1248 10 x: single '-' = 2 samples;
1249 11 x: single '-' = 1 sample; (ie. level can change every 1 sample)
1250 
1251 Shapes for rates 11 x look like this:
1252 rate: step:
1253 11 0 01234567
1254 
1255 level:
1256 0 --
1257 1 --
1258 2 --
1259 3 --
1260 
1261 rate: step:
1262 11 1 01234567
1263 
1264 level:
1265 0 --
1266 1 --
1267 2 -
1268 3 -
1269 4 --
1270 
1271 rate: step:
1272 11 2 01234567
1273 
1274 level:
1275 0 --
1276 1 -
1277 2 -
1278 3 --
1279 4 -
1280 5 -
1281 
1282 rate: step:
1283 11 3 01234567
1284 
1285 level:
1286 0 --
1287 1 -
1288 2 -
1289 3 -
1290 4 -
1291 5 -
1292 6 -
1293 
1294 
1295 For rates 12 x, 13 x, 14 x and 15 x output level changes on every
1296 sample - this means that the waveform looks like this: (but the level
1297 changes by different values on different steps)
1298 12 3 01234567
1299 
1300 0 -
1301 2 -
1302 4 -
1303 8 -
1304 10 -
1305 12 -
1306 14 -
1307 18 -
1308 20 -
1309 
1310 Notes about the timing:
1311 ----------------------
1312 
1313 1. Synchronism
1314 
1315 Output level of each two (or more) voices running at the same 'main' rate
1316 (eg 11 0 and 11 1 in the diagram below) will always be changing in sync,
1317 even if there're started with some delay.
1318 
1319 Note that, in the diagram below, the decay phase in channel 0 starts at
1320 sample #2, while in channel 1 it starts at sample #6. Anyway, both channels
1321 will always change their levels at exactly the same (following) samples.
1322 
1323 (S - start point of this channel, A-attack phase, D-decay phase):
1324 
1325 step:
1326 01234567012345670123456
1327 
1328 channel 0:
1329  --
1330  | --
1331  | -
1332  | -
1333  | --
1334  | --
1335 | --
1336 | -
1337 | -
1338 | --
1339 AADDDDDDDDDDDDDDDD
1340 S
1341 
1342 01234567012345670123456
1343 channel 1:
1344  -
1345  | -
1346  | --
1347  | --
1348  | --
1349  | -
1350  | -
1351  | --
1352  | --
1353  | --
1354  AADDDDDDDDDDDDDDDD
1355  S
1356 01234567012345670123456
1357 
1358 
1359 2. Shifted (delayed) synchronism
1360 
1361 Output of each two (or more) voices running at different 'main' rate
1362 (9 1, 10 1 and 11 1 in the diagrams below) will always be changing
1363 in 'delayed-sync' (even if there're started with some delay as in "1.")
1364 
1365 Note that the shapes are delayed by exactly one sample per one 'main' rate
1366 increment. (Normally one would expect them to start at the same samples.)
1367 
1368 See diagram below (* - start point of the shape).
1369 
1370 cycle:
1371 0123456701234567012345670123456701234567012345670123456701234567
1372 
1373 rate 09 1
1374 *-------
1375  --------
1376  ----
1377  ----
1378  --------
1379  *-------
1380  | --------
1381  | ----
1382  | ----
1383  | --------
1384 rate 10 1 |
1385 -- |
1386  *--- |
1387  ---- |
1388  -- |
1389  -- |
1390  ---- |
1391  *--- |
1392  | ---- |
1393  | -- | | <- one step (two samples) delay between 9 1 and 10 1
1394  | -- | |
1395  | ----|
1396  | *---
1397  | ----
1398  | --
1399  | --
1400  | ----
1401 rate 11 1 |
1402 - |
1403  -- |
1404  *- |
1405  -- |
1406  - |
1407  - |
1408  -- |
1409  *- |
1410  -- |
1411  - || <- one step (one sample) delay between 10 1 and 11 1
1412  - ||
1413  --|
1414  *-
1415  --
1416  -
1417  -
1418  --
1419  *-
1420  --
1421  -
1422  -
1423  --
1424 */
1425 
1426 void YM2151::Impl::advanceEG()
1427 {
1428  if (eg_timer++ != 3) {
1429  // envelope generator timer overlfows every 3 samples (on real chip)
1430  return;
1431  }
1432  eg_timer = 0;
1433  eg_cnt++;
1434 
1435  // envelope generator
1436  for (auto& op : oper) {
1437  switch (op.state) {
1438  case EG_ATT: // attack phase
1439  if (!(eg_cnt & ((1 << op.eg_sh_ar) - 1))) {
1440  op.volume += (~op.volume *
1441  (eg_inc[op.eg_sel_ar + ((eg_cnt >> op.eg_sh_ar) & 7)])
1442  ) >> 4;
1443  if (op.volume <= MIN_ATT_INDEX) {
1444  op.volume = MIN_ATT_INDEX;
1445  op.state = EG_DEC;
1446  }
1447  }
1448  break;
1449 
1450  case EG_DEC: // decay phase
1451  if (!(eg_cnt & ((1 << op.eg_sh_d1r) - 1))) {
1452  op.volume += eg_inc[op.eg_sel_d1r + ((eg_cnt >> op.eg_sh_d1r) & 7)];
1453  if (unsigned(op.volume) >= op.d1l) {
1454  op.state = EG_SUS;
1455  }
1456  }
1457  break;
1458 
1459  case EG_SUS: // sustain phase
1460  if (!(eg_cnt & ((1 << op.eg_sh_d2r) - 1))) {
1461  op.volume += eg_inc[op.eg_sel_d2r + ((eg_cnt >> op.eg_sh_d2r) & 7)];
1462  if (op.volume >= MAX_ATT_INDEX) {
1463  op.volume = MAX_ATT_INDEX;
1464  op.state = EG_OFF;
1465  }
1466  }
1467  break;
1468 
1469  case EG_REL: // release phase
1470  if (!(eg_cnt & ((1 << op.eg_sh_rr) - 1))) {
1471  op.volume += eg_inc[op.eg_sel_rr + ((eg_cnt >> op.eg_sh_rr) & 7)];
1472  if (op.volume >= MAX_ATT_INDEX) {
1473  op.volume = MAX_ATT_INDEX;
1474  op.state = EG_OFF;
1475  }
1476  }
1477  break;
1478  }
1479  }
1480 }
1481 
1482 void YM2151::Impl::advance()
1483 {
1484  // LFO
1485  if (test & 2) {
1486  lfo_phase = 0;
1487  } else {
1488  if (lfo_timer++ >= lfo_overflow) {
1489  lfo_timer = 0;
1490  lfo_counter += lfo_counter_add;
1491  lfo_phase += (lfo_counter >> 4);
1492  lfo_phase &= 255;
1493  lfo_counter &= 15;
1494  }
1495  }
1496 
1497  unsigned i = lfo_phase;
1498  // calculate LFO AM and PM waveform value (all verified on real chip,
1499  // except for noise algorithm which is impossible to analyse)
1500  int a, p;
1501  switch (lfo_wsel) {
1502  case 0:
1503  // saw
1504  // AM: 255 down to 0
1505  // PM: 0 to 127, -127 to 0 (at PMD=127: LFP = 0 to 126, -126 to 0)
1506  a = 255 - i;
1507  if (i < 128) {
1508  p = i;
1509  } else {
1510  p = i - 255;
1511  }
1512  break;
1513  case 1:
1514  // square
1515  // AM: 255, 0
1516  // PM: 128,-128 (LFP = exactly +PMD, -PMD)
1517  if (i < 128) {
1518  a = 255;
1519  p = 128;
1520  } else {
1521  a = 0;
1522  p = -128;
1523  }
1524  break;
1525  case 2:
1526  // triangle
1527  // AM: 255 down to 1 step -2; 0 up to 254 step +2
1528  // PM: 0 to 126 step +2, 127 to 1 step -2,
1529  // 0 to -126 step -2, -127 to -1 step +2
1530  if (i < 128) {
1531  a = 255 - (i * 2);
1532  } else {
1533  a = (i * 2) - 256;
1534  }
1535  if (i < 64) { // i = 0..63
1536  p = i * 2; // 0 to 126 step +2
1537  } else if (i < 128) { // i = 64..127
1538  p = 255 - i * 2; // 127 to 1 step -2
1539  } else if (i < 192) { // i = 128..191
1540  p = 256 - i*2; // 0 to -126 step -2
1541  } else { // i = 192..255
1542  p = i*2 - 511; // -127 to -1 step +2
1543  }
1544  break;
1545  case 3:
1546  default: // keep the compiler happy
1547  // Random. The real algorithm is unknown !!!
1548  // We just use a snapshot of data from real chip
1549 
1550  // AM: range 0 to 255
1551  // PM: range -128 to 127
1552  a = lfo_noise_waveform[i];
1553  p = a - 128;
1554  break;
1555  }
1556  lfa = a * amd / 128;
1557  lfp = p * pmd / 128;
1558 
1559  // The Noise Generator of the YM2151 is 17-bit shift register.
1560  // Input to the bit16 is negated (bit0 XOR bit3) (EXNOR).
1561  // Output of the register is negated (bit0 XOR bit3).
1562  // Simply use bit16 as the noise output.
1563 
1564  // noise changes depending on the index in noise_tab (noise_f = noise_tab[x])
1565  // noise_tab contains how many cycles/samples (x2) the noise should change.
1566  // so, when it contains 29, noise should change every 14.5 cycles (2 out of 29).
1567  // if you read this code well, you'll see that is what happens here :)
1568  noise_p -= 2;
1569  if (noise_p < 0) {
1570  noise_p += noise_f;
1571  unsigned j = ((noise_rng ^ (noise_rng >> 3)) & 1) ^ 1;
1572  noise_rng = (j << 16) | (noise_rng >> 1);
1573  }
1574 
1575  // phase generator
1576  YM2151Operator* op = &oper[0]; // CH 0 M1
1577  i = 8;
1578  do {
1579  // only when phase modulation from LFO is enabled for this channel
1580  if (op->pms) {
1581  int mod_ind = lfp; // -128..+127 (8bits signed)
1582  if (op->pms < 6) {
1583  mod_ind >>= (6 - op->pms);
1584  } else {
1585  mod_ind <<= (op->pms - 5);
1586  }
1587  if (mod_ind) {
1588  unsigned kc_channel = op->kc_i + mod_ind;
1589  (op + 0)->phase += ((freq[kc_channel + (op + 0)->dt2] + (op + 0)->dt1) * (op + 0)->mul) >> 1;
1590  (op + 1)->phase += ((freq[kc_channel + (op + 1)->dt2] + (op + 1)->dt1) * (op + 1)->mul) >> 1;
1591  (op + 2)->phase += ((freq[kc_channel + (op + 2)->dt2] + (op + 2)->dt1) * (op + 2)->mul) >> 1;
1592  (op + 3)->phase += ((freq[kc_channel + (op + 3)->dt2] + (op + 3)->dt1) * (op + 3)->mul) >> 1;
1593  } else { // phase modulation from LFO is equal to zero
1594  (op + 0)->phase += (op + 0)->freq;
1595  (op + 1)->phase += (op + 1)->freq;
1596  (op + 2)->phase += (op + 2)->freq;
1597  (op + 3)->phase += (op + 3)->freq;
1598  }
1599  } else { // phase modulation from LFO is disabled
1600  (op + 0)->phase += (op + 0)->freq;
1601  (op + 1)->phase += (op + 1)->freq;
1602  (op + 2)->phase += (op + 2)->freq;
1603  (op + 3)->phase += (op + 3)->freq;
1604  }
1605  op += 4;
1606  i--;
1607  } while (i);
1608 
1609  // CSM is calculated *after* the phase generator calculations (verified
1610  // on real chip)
1611  // CSM keyon line seems to be ORed with the KO line inside of the chip.
1612  // The result is that it only works when KO (register 0x08) is off, ie. 0
1613  //
1614  // Interesting effect is that when timer A is set to 1023, the KEY ON happens
1615  // on every sample, so there is no KEY OFF at all - the result is that
1616  // the sound played is the same as after normal KEY ON.
1617  if (csm_req) { // CSM KEYON/KEYOFF seqeunce request
1618  if (csm_req == 2) { // KEY ON
1619  op = &oper[0]; // CH 0 M1
1620  i = 32;
1621  do {
1622  keyOn(op, 2);
1623  op++;
1624  i--;
1625  } while (i);
1626  csm_req = 1;
1627  } else { // KEY OFF
1628  op = &oper[0]; // CH 0 M1
1629  i = 32;
1630  do {
1631  keyOff(op,unsigned(~2));
1632  op++;
1633  i--;
1634  } while (i);
1635  csm_req = 0;
1636  }
1637  }
1638 }
1639 
1640 void YM2151::Impl::generateChannels(int** bufs, unsigned num)
1641 {
1642  if (checkMuteHelper()) {
1643  // TODO update internal state, even if muted
1644  for (int i = 0; i < 8; ++i) {
1645  bufs[i] = nullptr;
1646  }
1647  return;
1648  }
1649 
1650  for (unsigned i = 0; i < num; ++i) {
1651  advanceEG();
1652 
1653  for (int j = 0; j < 8-1; ++j) {
1654  chanout[j] = 0;
1655  chanCalc(j);
1656  }
1657  chanout[7] = 0;
1658  chan7Calc(); // special case for channel 7
1659 
1660  for (int j = 0; j < 8; ++j) {
1661  bufs[j][2 * i + 0] += chanout[j] & pan[2 * j + 0];
1662  bufs[j][2 * i + 1] += chanout[j] & pan[2 * j + 1];
1663  }
1664  advance();
1665  }
1666 }
1667 
1668 void YM2151::Impl::callback(byte flag)
1669 {
1670  if (flag & 0x20) { // Timer 1
1671  if (irq_enable & 0x04) {
1672  setStatus(1);
1673  }
1674  if (irq_enable & 0x80) {
1675  csm_req = 2; // request KEY ON / KEY OFF sequence
1676  }
1677  }
1678  if (flag & 0x40) { // Timer 2
1679  if (irq_enable & 0x08) {
1680  setStatus(2);
1681  }
1682  }
1683 }
1684 
1686 {
1687  return status;
1688 }
1689 
1690 void YM2151::Impl::setStatus(byte flags)
1691 {
1692  status |= flags;
1693  if (status) {
1694  irq.set();
1695  }
1696 }
1697 
1698 void YM2151::Impl::resetStatus(byte flags)
1699 {
1700  status &= ~flags;
1701  if (!status) {
1702  irq.reset();
1703  }
1704 }
1705 
1706 
1707 template<typename Archive>
1708 void YM2151::Impl::YM2151Operator::serialize(Archive& ar, unsigned /*version*/)
1709 {
1710  //int* connect; // recalculated from regs[0x20-0x27]
1711  //int* mem_connect; // recalculated from regs[0x20-0x27]
1712  ar.serialize("phase", phase);
1713  ar.serialize("freq", freq);
1714  ar.serialize("dt1", dt1);
1715  ar.serialize("mul", mul);
1716  ar.serialize("dt1_i", dt1_i);
1717  ar.serialize("dt2", dt2);
1718  ar.serialize("mem_value", mem_value);
1719  //ar.serialize("fb_shift", fb_shift); // recalculated from regs[0x20-0x27]
1720  ar.serialize("fb_out_curr", fb_out_curr);
1721  ar.serialize("fb_out_prev", fb_out_prev);
1722  ar.serialize("kc", kc);
1723  ar.serialize("kc_i", kc_i);
1724  ar.serialize("pms", pms);
1725  ar.serialize("ams", ams);
1726  ar.serialize("AMmask", AMmask);
1727  ar.serialize("state", state);
1728  ar.serialize("tl", tl);
1729  ar.serialize("volume", volume);
1730  ar.serialize("d1l", d1l);
1731  ar.serialize("key", key);
1732  ar.serialize("ks", ks);
1733  ar.serialize("ar", this->ar);
1734  ar.serialize("d1r", d1r);
1735  ar.serialize("d2r", d2r);
1736  ar.serialize("rr", rr);
1737  ar.serialize("eg_sh_ar", eg_sh_ar);
1738  ar.serialize("eg_sel_ar", eg_sel_ar);
1739  ar.serialize("eg_sh_d1r", eg_sh_d1r);
1740  ar.serialize("eg_sel_d1r", eg_sel_d1r);
1741  ar.serialize("eg_sh_d2r", eg_sh_d2r);
1742  ar.serialize("eg_sel_d2r", eg_sel_d2r);
1743  ar.serialize("eg_sh_rr", eg_sh_rr);
1744  ar.serialize("eg_sel_rr", eg_sel_rr);
1745 };
1746 
1747 template<typename Archive>
1748 void YM2151::Impl::serialize(Archive& ar, unsigned /*version*/)
1749 {
1750  ar.serialize("irq", irq);
1751  ar.serialize("timer1", *timer1);
1752  ar.serialize("timer2", *timer2);
1753  ar.serialize("operators", oper);
1754  //ar.serialize("pan", pan); // recalculated from regs[0x20-0x27]
1755  ar.serialize("eg_cnt", eg_cnt);
1756  ar.serialize("eg_timer", eg_timer);
1757  ar.serialize("lfo_phase", lfo_phase);
1758  ar.serialize("lfo_timer", lfo_timer);
1759  ar.serialize("lfo_overflow", lfo_overflow);
1760  ar.serialize("lfo_counter", lfo_counter);
1761  ar.serialize("lfo_counter_add", lfo_counter_add);
1762  ar.serialize("lfa", lfa);
1763  ar.serialize("lfp", lfp);
1764  ar.serialize("noise", noise);
1765  ar.serialize("noise_rng", noise_rng);
1766  ar.serialize("noise_p", noise_p);
1767  ar.serialize("noise_f", noise_f);
1768  ar.serialize("csm_req", csm_req);
1769  ar.serialize("irq_enable", irq_enable);
1770  ar.serialize("status", status);
1771  ar.serialize("chanout", chanout);
1772  ar.serialize("m2", m2);
1773  ar.serialize("c1", c1);
1774  ar.serialize("c2", c2);
1775  ar.serialize("mem", mem);
1776  ar.serialize("timer_A_val", timer_A_val);
1777  ar.serialize("lfo_wsel", lfo_wsel);
1778  ar.serialize("amd", amd);
1779  ar.serialize("pmd", pmd);
1780  ar.serialize("test", test);
1781  ar.serialize("ct", ct);
1782  ar.serialize_blob("registers", regs, sizeof(regs));
1783 
1784  if (ar.isLoader()) {
1785  // TODO restore more state from registers
1786  EmuTime::param time = timer1->getCurrentTime();
1787  for (int r = 0x20; r < 0x28; ++r) {
1788  writeReg(r , regs[r], time);
1789  }
1790  }
1791 }
1792 
1793 
1794 // YM2151
1795 
1796 YM2151::YM2151(const std::string& name, const std::string& desc,
1797  const DeviceConfig& config, EmuTime::param time)
1798  : pimpl(make_unique<Impl>(name, desc, config, time))
1799 {
1800 }
1801 
1803 {
1804 }
1805 
1807 {
1808  pimpl->reset(time);
1809 }
1810 
1812 {
1813  pimpl->writeReg(r, v, time);
1814 }
1815 
1817 {
1818  return pimpl->readStatus();
1819 }
1820 
1821 template<typename Archive>
1822 void YM2151::serialize(Archive& ar, unsigned version)
1823 {
1824  pimpl->serialize(ar, version);
1825 }
1827 
1828 } // namespace openmsx
void reset(EmuTime::param time)
Definition: YM2151.cc:1052
unsigned char byte
8 bit unsigned integer
Definition: openmsx.hh:33
void writeReg(byte r, byte v, EmuTime::param time)
Definition: YM2151.cc:1811
byte readStatus() const
Definition: YM2151.cc:1816
byte readStatus() const
Definition: YM2151.cc:1685
void writeReg(byte r, byte v, EmuTime::param time)
Definition: YM2151.cc:799
void advance(octet_iterator &it, distance_type n, octet_iterator end)
#define O(a)
Definition: YM2151.cc:311
void setInputRate(unsigned sampleRate)
Definition: SoundDevice.hh:79
Impl(const std::string &name, const std::string &desc, const DeviceConfig &config, EmuTime::param time)
Definition: YM2151.cc:1015
Thanks to enen for testing this on a real cartridge:
Definition: Autofire.cc:7
unsigned short word
16 bit unsigned integer
Definition: openmsx.hh:38
void serialize(Archive &ar, unsigned version)
Definition: YM2151.cc:1822
void serialize(Archive &ar, unsigned version)
Definition: YM2151.cc:1748
#define INSTANTIATE_SERIALIZE_METHODS(CLASS)
Definition: serialize.hh:802
YM2151(const std::string &name, const std::string &desc, const DeviceConfig &config, EmuTime::param time)
Definition: YM2151.cc:1796
void reset(EmuTime::param time)
Definition: YM2151.cc:1806
const string getName(KeyCode keyCode)
Translate key code to key name.
Definition: Keys.cc:373
std::unique_ptr< T > make_unique()
Definition: memory.hh:27
void serialize(Archive &ar, T &t, unsigned version)
void registerSound(const DeviceConfig &config)
Registers this sound device with the Mixer.
Definition: SoundDevice.cc:81