39 if (
rom->getSize() != 0x100000) {
41 "Rom for HALNOTE mapper must be exactly 1MB in size.");
43 sram = make_unique<SRAM>(
getName() +
" SRAM", 0x4000, config);
53 subBanks[0] = subBanks[1] = 0;
55 subMapperEnabled =
false;
59 for (
int i = 2; i < 6; i++) {
68 if (subMapperEnabled && (0x7000 <= address) && (address < 0x8000)) {
70 int subBank = address < 0x7800 ? 0 : 1;
71 return &(*rom)[0x80000 + subBanks[subBank] * 0x800 + (address & 0x7FF)];
85 if (address < 0x4000) {
88 sram->write(address, value);
90 }
else if (address < 0xC000) {
91 if ((address == 0x77FF) || (address == 0x7FFF)) {
93 int subBank = address < 0x7800 ? 0 : 1;
94 if (subBanks[subBank] != value) {
95 subBanks[subBank] = value;
96 if (subMapperEnabled) {
98 0x7000 + subBank * 0x800, 0x800);
101 }
else if ((address & 0x1FFF) == 0x0FFF) {
103 int bank = address >> 13;
107 bool newSramEnabled = (value & 0x80) != 0;
108 if (newSramEnabled != sramEnabled) {
109 sramEnabled = newSramEnabled;
118 }
else if (bank == 3) {
120 bool newSubMapperEnabled = (value & 0x80) != 0;
121 if (newSubMapperEnabled != subMapperEnabled) {
122 subMapperEnabled = newSubMapperEnabled;
132 if (address < 0x4000) {
137 }
else if (address < 0xC000) {
138 if (((address & CacheLine::HIGH) == (0x77FF & CacheLine::HIGH)) ||
139 ((address & CacheLine::HIGH) == (0x7FFF & CacheLine::HIGH))) {
142 }
else if ((address & 0x1FFF & CacheLine::HIGH) ==
143 (0x0FFF & CacheLine::HIGH)) {
151 template<
typename Archive>
154 ar.template serializeBase<Rom8kBBlocks>(*this);
155 ar.serialize(
"subBanks", subBanks);
156 ar.serialize(
"sramEnabled", sramEnabled);
157 ar.serialize(
"subMapperEnabled", subMapperEnabled);