1 #ifndef MSXCPUINTERFACE_HH
2 #define MSXCPUINTERFACE_HH
23 class SlottedMemoryDebug;
27 class ExternalSlotInfo;
61 int primSl,
int secSL,
int base,
int size);
63 int primSl,
int secSL,
int base,
int size);
80 if (
unlikely(disallowReadCache[address >> CacheLine::BITS])) {
81 return readMemSlow(address, time);
83 return visibleDevices[address >> 14]->
readMem(address, time);
90 if (
unlikely(disallowWriteCache[address >> CacheLine::BITS])) {
91 writeMemSlow(address, value, time);
93 visibleDevices[address>>14]->
writeMem(address, value, time);
101 return IO_In[port & 0xFF]->
readIO(port, time);
109 IO_Out[port & 0xFF]->
writeIO(port, value, time);
125 if (
unlikely(disallowReadCache[start >> CacheLine::BITS])) {
144 if (
unlikely(disallowWriteCache[start >> CacheLine::BITS])) {
175 inline bool isExpanded(
int ps)
const {
return expanded[ps] != 0; }
184 typedef std::multimap<word, std::shared_ptr<BreakPoint>>
BreakPoints;
187 void setWatchPoint(
const std::shared_ptr<WatchPoint>& watchPoint);
193 static void setCondition(
const std::shared_ptr<DebugCondition>& cond);
196 typedef std::vector<std::shared_ptr<DebugCondition>>
Conditions;
213 return !breakPoints.empty() || !conditions.empty();
217 auto range = breakPoints.equal_range(pc);
218 if (conditions.empty() && (range.first == range.second)) {
235 template<
typename Archive>
236 void serialize(Archive& ar,
unsigned version);
244 void register_IO (
int port,
bool isIn,
248 int ps,
int ss,
int base,
int size);
250 int ps,
int ss,
int base,
int size);
252 int ps,
int ss,
int base,
int size);
256 BreakPoints::const_iterator> range);
258 void removeAllWatchPoints();
263 unsigned value = ~0u);
270 const std::unique_ptr<MemoryDebug> memoryDebug;
271 const std::unique_ptr<SlottedMemoryDebug> slottedMemoryDebug;
272 const std::unique_ptr<IODebug> ioDebug;
273 const std::unique_ptr<SlotInfo> slotInfo;
274 const std::unique_ptr<SubSlottedInfo> subSlottedInfo;
275 const std::unique_ptr<ExternalSlotInfo> externalSlotInfo;
276 const std::unique_ptr<IOInfo> inputPortInfo;
277 const std::unique_ptr<IOInfo> outputPortInfo;
285 void updateVisible(
int page);
286 inline void updateVisible(
int page,
int ps,
int ss);
287 void setSubSlot(
byte primSlot,
byte value);
289 std::unique_ptr<DummyDevice> dummyDevice;
294 std::unique_ptr<VDPIODelay> delayDevice;
296 byte disallowReadCache [CacheLine::NUM];
297 byte disallowWriteCache[CacheLine::NUM];
298 std::bitset<CacheLine::SIZE> readWatchSet [CacheLine::NUM];
299 std::bitset<CacheLine::SIZE> writeWatchSet[CacheLine::NUM];
301 struct GlobalWriteInfo {
304 bool operator==(
const GlobalWriteInfo& rhs)
const {
305 return (device == rhs.device) &&
309 std::vector<GlobalWriteInfo> globalWrites;
315 byte subSlotRegister[4];
316 byte primarySlotState[4];
317 byte secondarySlotState[4];
318 unsigned expanded[4];
327 static bool continued;